# Is riscv still supported? **URL:** \ **Category:** General\ **Created:** [January 12, 2026, 6:52pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252 "2026-01-12T18:52:29Z")\ **Posts on this page:** 15\ **Page:** 1
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [January 12, 2026, 6:52pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/1 "2026-01-12T18:52:29Z")
Hello there! I’d like to try to add support for my mlikv mergez, but it seems that genode-riscv doesn’t compile anymore or I’m doing something very wrong: ```auto bogdan@fractal:~/work/mk/gen/genode/build/riscv$ make BOARD=migv core Library base-hw-common.lib.a COMPILE allocator_avl.o COMPILE avl_tree.o .... Library core-hw-migv.lib.a make[2]: *** No rule to make target '/home/bogdan/work/mk/gen/genode/repos/base-hw/src/lib/hw//memory_consts.s', needed by 'hw/memory_consts.h'. Stop. make[1]: *** [var/libdeps:80: core-hw-migv.lib.a] Error 2 make: *** [Makefile:351: gen_deps_and_build_targets] Error 2 ``` different issues for `bootstrap` target: ```auto bogdan@fractal:~/work/mk/gen/genode/build/riscv$ make BOARD=migv bootstrap Library cxx.lib.a COMPILE unwind.o MERGE cxx.lib.a Program bootstrap/board/migv/bootstrap-sram-migv COMPILE bootstrap_sdram.o ASSEMBLE crt0.o COMPILE lib/base/allocator_avl.o COMPILE hw/capability.o COMPILE lib/base/avl_tree.o COMPILE lib/base/heap.o COMPILE lib/base/log.o COMPILE lib/base/output.o COMPILE lib/base/raw_output.o COMPILE lib/base/registry.o COMPILE lib/base/slab.o COMPILE lib/base/sleep.o COMPILE lib/startup/_main.o /home/bogdan/work/mk/gen/genode/repos/base/src/lib/base/raw_output.cc:19:10: fatal error: base/internal/raw_write_string.h: No such file or directory 19 | #include | ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[2]: *** [/home/bogdan/work/mk/gen/genode/repos/base/mk/generic.mk:73: lib/base/raw_output.o] Error 1 make[2]: *** Waiting for unfinished jobs.... /home/bogdan/work/mk/riscv/src/bootstrap/board/migv/bootstrap_sdram.cc:22:1: error: expected class-name before ‘{’ token 22 | { | ^ /home/bogdan/work/mk/riscv/src/bootstrap/board/migv/bootstrap_sdram.cc:26:30: error: expected template-name before ‘<’ token 26 | struct Rst : Register<0x4, 32> | ^ /home/bogdan/work/mk/riscv/src/bootstrap/board/migv/bootstrap_sdram.cc:26:30: error: expected ‘{’ before ‘<’ token /home/bogdan/work/mk/riscv/src/bootstrap/board/migv/bootstrap_sdram.cc:26:30: error: expected unqualified-id before ‘<’ token /home/bogdan/work/mk/riscv/src/bootstrap/board/migv/bootstrap_sdram.cc:31:34: error: expected template-name before ‘<’ token .... ``` I’m quite new to genode, but I really like to start using it. Is there any quick start guide for beginners (for riscv/arm64 rpi) ? E.g. how to build the “minimal” system? Is it possible to use genode/sculpt from command line only? If yes, how? Thanks in advance! ---
**Author:** ![nfeske](https://dub1.discourse-cdn.com/flex006/user_avatar/genode.discourse.group/nfeske/32/6_2.png) [@nfeske](https://genode.discourse.group/u/nfeske)\ **Post date:** [January 13, 2026, 10:07am UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/2 "2026-01-13T10:07:53Z")
Welcome to the forum! It looks like you missed specifying the `KERNEL=hw` argument. For a quick start, I recommend getting you toe wet by using Qemu. E.g., build and run the simple log scenario at (repos/base/run/log.run) via ```auto build/riscv$ make run/log KERNEL=hw BOARD=virt_qemu_riscv ``` To enable Genode on a new hardware platform, please consider giving the [Genode Platforms](https://genode.org/documentation/genode-platforms-23-05.pdf) book a read. Even though it might not be directly applicable to RISC-V, it will point you to the right places and give you a guiding rail of steps to follow. ---
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [January 13, 2026, 11:06am UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/3 "2026-01-13T11:06:41Z")
Thanks! Sadly no joy, `KERNEL=hw` was already set in `build/riscv/etc/build.conf` This is how `build.conf` looks like: ```auto GENODE_DIR := /home/bogdan/work/mk/gen/genode BASE_DIR := $(GENODE_DIR)/repos/base CONTRIB_DIR := $(GENODE_DIR)/contrib REPOSITORIES += $(GENODE_DIR)/repos/riscv # enable parallel build MAKE += -j40 # enable use of compiler cache #CCACHE := yes ## ## Run-tool configuration ## # create depot archives and update recipe versions automatically #RUN_OPT += --depot-auto-update # local variable for run-tool arguments used for running scenarios in Qemu QEMU_RUN_OPT := --include power_on/qemu --include log/qemu # kernel to use KERNEL ?= hw # board to use (riscv_qemu) BOARD ?= virt_qemu_riscv # local variable for run-tool arguments that depend on the used board BOARD_RUN_OPT(virt_qemu_riscv) = $(QEMU_RUN_OPT) ifdef BOARD RUN_OPT += ${BOARD_RUN_OPT(${BOARD})} endif ifdef KERNEL RUN_OPT += --include boot_dir/$(KERNEL) endif ..... ``` ---
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [January 13, 2026, 12:16pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/4 "2026-01-13T12:16:40Z")
> [@bog\_dan\_ro](#): > > `REPOSITORIES += $(GENODE_DIR)/repos/riscv` Removing the ^ fixed the build ! 🙂 It seems [GitHub - genodelabs/genode-riscv: RISC-V board support](https://github.com/genodelabs/genode-riscv) is outdated and needs more love. Sorry for the noise ! ---
**Author:** ![skalk](https://dub1.discourse-cdn.com/flex006/user_avatar/genode.discourse.group/skalk/32/23_2.png) [@skalk](https://genode.discourse.group/u/skalk)\ **Post date:** [January 14, 2026, 12:52pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/5 "2026-01-14T12:52:58Z")
Hi, I can build core and bootstrap for `virt_qemu_riscv`, as well as `migv` successfully using the referenced `genodelabs/genode-riscv` repository that is enabled within my build configuration. Maybe you’ve used incompatible branches in between `genode` and `genode-riscv`? Or what exactly do you meant by: > [@bog\_dan\_ro](#): > > It seems [GitHub - genodelabs/genode-riscv: RISC-V board support](https://github.com/genodelabs/genode-riscv) is outdated and needs more love. ---
**Author:** ![ssumpf](https://dub1.discourse-cdn.com/flex006/user_avatar/genode.discourse.group/ssumpf/32/14_2.png) [@ssumpf](https://genode.discourse.group/u/ssumpf)\ **Post date:** [January 15, 2026, 8:02pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/6 "2026-01-15T20:02:42Z")
@bog_dan_ro: Yes, RISC-V support needs a little love. When I started this project ten years ago RISC-V looked very promising. As of today, we still have not come across a real life use case were RISC-V has been required or asked for. So in case you want to move RISC-V forward on Genode, I am all ears and willing to help where I can. ---
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [January 16, 2026, 5:11pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/7 "2026-01-16T17:11:28Z")
Hi, I’m still struggling to build it for riscv 🙂 . I have the feeling that my setup might be to blame so I create a Dockefile (based on [genode-devel-docker/Dockerfile at main · skalk/genode-devel-docker · GitHub](https://github.com/skalk/genode-devel-docker/blob/main/Dockerfile) ) and a simple build script to be sure we all using the same setup. I uploaded them here [GitHub - bog-dan-ro/genode-docker-build](https://github.com/bog-dan-ro/genode-docker-build/tree/master) . If you can check them to see what I’m doing wrong, it will help me a lot. Thanks! ---
**Author:** ![ssumpf](https://dub1.discourse-cdn.com/flex006/user_avatar/genode.discourse.group/ssumpf/32/14_2.png) [@ssumpf](https://genode.discourse.group/u/ssumpf)\ **Post date:** [January 16, 2026, 8:22pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/8 "2026-01-16T20:22:39Z")
> [@bog\_dan\_ro](#): > > If you can check them to see what I’m doing wrong, it will help me a lot. @bog_dan_ro: Okay, I have installed a Debian 13 VM and tried your `genode-docker-build`. For me there were two show stoppers in your _build\_genode.sh_ file 1. I could not clone `https://github.com/genodelabs/genode.git` into the root directory (/) of the docker image, there was always some corruption. Therefore, I cloned everything to _/home/test_ (this might work for you though) 2. `https://github.com/ssumpf/genode-riscv.git` is my development branch from 5 years ago and it **will not work**. You need to change that to the official Genode repository `https://github.com/genodelabs/genode-riscv.git` which is where all the results of the development work go to. After 1. and 2. `make core bootstrap` worked for me. ---
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [January 16, 2026, 9:03pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/9 "2026-01-16T21:03:21Z")
It worked, thank you so much! I’m such an idiot 🙂 . ```auto ... kernel initialized Genode 25.11-56-g8e6112c491 504 MiB RAM and 64536 caps assigned to init [init -> test-log] hex range: [0e00,1680) [init -> test-log] empty hex range: [0abc0000,0abc0000) (empty!) [init -> test-log] hex range to limit: [f8,ff] [init -> test-log] invalid hex range: [f8,08) (overflow!) [init -> test-log] negative hex char: 0xfe [init -> test-log] positive hex char: 0x02 [init -> test-log] Alloc_error value: OUT_OF_RAM [init -> test-log] floating point: 1.70 [init -> test-log] multiarg string: "parent -> child.7" [init -> test-log] String(Hex(3)): 0x3 [init -> test-log] Very long messages: [init -> test-log -> log] 1.....................................................................................................................................................................................................................................2 [init -> test-log] 3.....................................................................................................................................................................................................................................4 [init -> test-log] 5.....................................................................................................................................................................................................................................6 [init -> test-log] [init -> test-log] Test done. Run script execution successful. ``` I’ll start reading [Genode Platforms](https://genode.org/documentation/genode-platforms-23-05.pdf) and get back to you when I’ll need more help. Thanks again! ---
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [February 1, 2026, 8:12am UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/10 "2026-02-01T08:12:52Z")
I started with a more simple riscv board ([Duo | Milk-V](https://milkv.io/docs/duo/getting-started/duo)) hopping that it will just work, but it wasn’t 🙂. It crashes after it starts the core: ```auto Filename '/image-hw.elf'. Load address: 0x80080000 Loading: ################################################################# ################################################################# ############### 5.4 MiB/s done Bytes transferred = 2114608 (204430 hex) cv180x_c906# bootelf ## Starting application at 0x81000000 ... called from 0xffffffc00005112e Kernel panic on CPU id=0 Exception reason is page-fault Register dump: ip = 0xffffffc000029b8e ra = 0xffffffc000029b74 sp = 0xffffffe07000ff40 gp = 0x81c09e30 tp = 0x0 t0 = 0x40 t1 = 0x2 t2 = 0xffffffffffffffff s0 = 0xffffffc0002d9000 s1 = 0xffffffc0002d9000 a0 = 0xffffffc0003e7000 a1 = 0x1000 a2 = 0xfffffffcaba5d820 a3 = 0x1d1e7642c78daa a4 = 0xff26061300000617 a5 = 0xffffffe040001010 a6 = 0x0 a7 = 0x1 s2 = 0xffffffc0002d50d8 s3 = 0xffffffc0002d83c8 s4 = 0xffffffc0002d3000 s5 = 0x5000 s6 = 0xffffffc0002d50d8 s7 = 0xffffffc0002d3008 s8 = 0x0 s9 = 0x0 s10 = 0x0 s11 = 0x0 t3 = 0x3f t4 = 0x40 t5 = 0xffffffffffffffff t6 = 0x3f Backtrace: << no backtrace >> ``` ```auto $ riscv64-linux-gnu-addr2line -e log.core.debug 0xffffffc00005112e /home/bogdan/work/mk/gn/genode/repos/base-hw/src/core/kernel/main.cc:81 ``` Here [GitHub - bog-dan-ro/genode-riscv: RISC-V board support](https://github.com/bog-dan-ro/genode-riscv) is my WIP. I probably did something very stupid, but I can’t figure out what, any help will be highly appreciated. BTW, on riscv, u-boot sets in a0 register the hart id and in a1 register the FDT(DTB) ptr. Isn’t better to parse the FDT in bootstrap and get all the needed info (e.g. ram base, ram size, cpu count, interrupt controller, etc.) instead of hard-coding them? Some riscv boards even supports ram sticks (e.g. [Milk-V Titan](https://milkv.io/titan) ) which can’t be hard-coded… ---
**Author:** ![skalk](https://dub1.discourse-cdn.com/flex006/user_avatar/genode.discourse.group/skalk/32/23_2.png) [@skalk](https://genode.discourse.group/u/skalk)\ **Post date:** [February 3, 2026, 2:19pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/11 "2026-02-03T14:19:37Z")
Hi, congratulations for already passing the bootstrap part, and finally executing within the kernel already 😉. > [@bog\_dan\_ro](#): > > ```auto > $ riscv64-linux-gnu-addr2line -e log.core.debug 0xffffffc00005112e > /home/bogdan/work/mk/gn/genode/repos/base-hw/src/core/kernel/main.cc:81 > > ``` That address is of minor interest. But the ip (instruction-pointer) of the above kernel panic’s register dump is probably interesting (`0xffffffc000029b8e`), as it lead to the page-fault. > [@bog\_dan\_ro](#): > > I probably did something very stupid, but I can’t figure out what, any help will be highly appreciated. When skimming through your enabling commit, I noticed that your RAM description in `src/include/hw/spec/riscv/milkv_duo_board.h` does not equal to the boards RAM definition in the device tree sources that you’ve commited too. I think it should be: ```auto RAM_BASE = 0x80000000, RAM_SIZE = 0x3f40000, ... ``` Or, are there other restriction that forced you to use this small chunk of ~28MiB? > [@bog\_dan\_ro](#): > > BTW, on riscv, u-boot sets in a0 register the hart id and in a1 register the FDT(DTB) ptr. > > Isn’t better to parse the FDT in bootstrap and get all the needed info (e.g. ram base, ram size, cpu count, interrupt controller, etc.) instead of hard-coding them? > > Some riscv boards even supports ram sticks (e.g. [Milk-V Titan](https://milkv.io/titan) ) which can’t be hard-coded… It would be obviously more convenient to parse FDTs in bootstrap. Until now, we decided against it. For the very few information that we need in the kernel (Ram, Timer, Irq controller, Cpus), and which where always fixed (till now), the tradeoff in between having additional parsing routines or few lines of address definitions was answered with following the second path. I wouldn’t be reluctant to support it in general, as long as the FDT parser is very simple, no moving target, and doesn’t affect the TCB much. Anyway, when comparing this convenience enhancement with other open issues, I’m hesitant to do any promises yet. ---
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [February 5, 2026, 12:41pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/12 "2026-02-05T12:41:06Z")
Thanks for your time! I had more luck with milkv-megrez 😉 . ```auto Autoboot in 5 seconds => run genode ethernet@50400000 Waiting for PHY auto negotiation to complete..... done BOOTP broadcast 1 DHCP client bound to address 192.168.0.159 (7 ms) Using ethernet@50400000 device TFTP from server 192.168.0.31; our IP address is 192.168.0.159 Filename '/image-hw.elf'. Load address: 0x84000000 Loading: ################################################################# ################################################################# ############### 9.6 MiB/s done Bytes transferred = 2114608 (204430 hex) Automatic boot of image at addr 0x84000000 ... Wrong Image Format for bootp command ERROR: can't get kernel image! ## Starting application at 0x81000000 ... Kernel: Hello from boostrap ! void Kernel::main_initialize_and_handle_kernel_entry() kernel initialized Genode 25.11-56-g8e6112c491 32760 MiB RAM and 64536 caps assigned to init [init -> test-log] hex range: [0e00,1680) [init -> test-log] empty hex range: [0abc0000,0abc0000) (empty!) [init -> test-log] hex range to limit: [f8,ff] [init -> test-log] invalid hex range: [f8,08) (overflow!) [init -> test-log] negative hex char: 0xfe [init -> test-log] positive hex char: 0x02 [init -> test-log] Alloc_error value: OUT_OF_RAM [init -> test-log] floating point: 1.70 [init -> test-log] multiarg string: "parent -> child.7" [init -> test-log] String(Hex(3)): 0x3 [init -> test-log] Very long messages: [init -> test-log -> log] 1................................................................................................................................................................................................................................. ....2 [init -> test-log] 3.....................................................................................................................................................................................................................................4 [init -> test-log] 5.....................................................................................................................................................................................................................................6 [init -> test-log] [init -> test-log] Test done. ``` There are a few problems which I’m going to investigate this weekend: 1. It works with only one CPU. My _hunch_ is it hangs because it assumes that the boot hart is always hart 0 which is not true, it can be any of the available harts. 2. I need to figure out where TIMER\_HZ is used and how important it is 🙂. timer\_accuracy hangs at startup same test-init ```auto ## Starting application at 0x81000000 ... Kernel: Hello from boostrap ! void Kernel::main_initialize_and_handle_kernel_entry() kernel initialized Genode 25.11-56-g8e6112c491 32760 MiB RAM and 64536 caps assigned to init [init -> test-timer_accuracy] ## Starting application at 0x81000000 ... Kernel: Hello from boostrap ! void Kernel::main_initialize_and_handle_kernel_entry() kernel initialized Genode 25.11-56-g8e6112c491 32760 MiB RAM and 64536 caps assigned to init [init -> test -> test-init] step 0 (sleep) ``` > [@skalk](#): > > When skimming through your enabling commit, I noticed that your RAM description in `src/include/hw/spec/riscv/milkv_duo_board.h` does not equal to the boards RAM definition in the device tree sources that you’ve commited too. I think it should be: > > ```auto > RAM_BASE = 0x80000000, > RAM_SIZE = 0x3f40000, > ... > > ``` > > Or, are there other restriction that forced you to use this small chunk of ~28MiB? Yes, they are reserved [see](https://github.com/bog-dan-ro/genode-riscv/blob/master/board/milkv_duo/logs.txt). Regarding the FDT, IMHO parsing FDT in bootstrap will make the “core” part super portable, it will not need anything, it will also save people like me from a lot of pain and tears 🙂 … FDT should be quite simple, I’ll give it a try and come back to you with a Merge Request. Last but not least, is it possible to create a more complex image, with some command line tools (e.g.shell) ? ---
**Author:** ![skalk](https://dub1.discourse-cdn.com/flex006/user_avatar/genode.discourse.group/skalk/32/23_2.png) [@skalk](https://genode.discourse.group/u/skalk)\ **Post date:** [February 6, 2026, 12:01pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/13 "2026-02-06T12:01:03Z")
> [@bog\_dan\_ro](#): > > There are a few problems which I’m going to investigate this weekend: > > 1. It works with only one CPU. My _hunch_ is it hangs because it assumes that the boot hart is always hart 0 which is not true, it can be any of the available harts. > 2. I need to figure out where TIMER\_HZ is used and how important it is 🙂. timer\_accuracy hangs at startup same test-init Yes, supporting several cpus was not addressed yet when doing the initial port to this architecture. At that time, if I remember correctly the FPGA-based hardware only had one cpu core. The TIMER\_HZ is used in the kernel timer implementation for riscv, which uses the `rdtime` instruction. The timer frequency is hardcoded using the TIMER\_HZ variable. If its value is wrong, kernel time will be misleading, which is used via syscall for the userland timer too. > [@bog\_dan\_ro](#): > > Yes, they are reserved [see](https://github.com/bog-dan-ro/genode-riscv/blob/master/board/milkv_duo/logs.txt). Wow, more memory reserved than available 😉 > [@bog\_dan\_ro](#): > > Regarding the FDT, IMHO parsing FDT in bootstrap will make the “core” part super portable, it will not need anything, it will also save people like me from a lot of pain and tears 🙂 … > > FDT should be quite simple, I’ll give it a try and come back to you with a Merge Request. > > Last but not least, is it possible to create a more complex image, with some command line tools (e.g.shell) ? Well, in general yes. Our libc and lwIP library ports are riscv-ready and tested nightly. For the qemu riscv “board” we also have a bunch of drivers ready to run interactive and network scenarios. But for your board target you will need either some drivers for input and framebuffer, or at least a network driver to support more sophisticated scenarios. I just tried the bash.run and vim.run scripts using qemu, which in general work. (Although I noticed that the “cap” quota for the terminal is to low in both examples using this platform) For both examples you need a `drivers_interactive-[board]` depot package, which spawns a sub-system running input and framebuffer driver. You can have a look at similarily labeled packages as blueprint. ---
**Author:** ![bog\_dan\_ro](https://avatars.discourse-cdn.com/v4/letter/b/22d042/32.png) [@bog\_dan\_ro](https://genode.discourse.group/u/bog_dan_ro)\ **Post date:** [February 9, 2026, 5:52pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/14 "2026-02-09T17:52:37Z")
> [@skalk](#): > > The TIMER\_HZ is used in the kernel timer implementation for riscv, which uses the `rdtime` instruction. The timer frequency is hardcoded using the TIMER\_HZ variable. If its value is wrong, kernel time will be misleading, which is used via syscall for the userland timer too. I thought it’s the CPU freq but it’s the timer freq ( **/cpus/timebase-frequency** from DTS/FDT). I set it to the correct value and all the tests are working now! Thanks! > [@skalk](#): > > Yes, supporting several cpus was not addressed yet when doing the initial port to this architecture. At that time, if I remember correctly the FPGA-based hardware only had one cpu core. AFAIK qemu has multicore support for years. Last weekend I create a simple FDT parser which extracts all the needed info (boot hart id, CPUs count, memory regions, timer hz & interrupt-controler mem reg) which is now hard-coded. I need help with two things: - do you have any **.clang-format** for your code style? I’d like to run it over my code before I submit the patch as my ide (qt-creator) doesn’t know the code style used in genode so it broke most of the new/changed lines. - I need some help to pass the extracted infoto the core part and make use of them. ---
**Author:** ![skalk](https://dub1.discourse-cdn.com/flex006/user_avatar/genode.discourse.group/skalk/32/23_2.png) [@skalk](https://genode.discourse.group/u/skalk)\ **Post date:** [February 10, 2026, 1:50pm UTC](https://genode.discourse.group/t/is-riscv-still-supported/252/15 "2026-02-10T13:50:25Z")
> [@bog\_dan\_ro](#): > > > [@skalk](#): > > > > Yes, supporting several cpus was not addressed yet when doing the initial port to this architecture. At that time, if I remember correctly the FPGA-based hardware only had one cpu core. > > AFAIK qemu has multicore support for years. Probably, I was refering to the FPGA-based hardware we used as when initially supported RiscV the first time. But anyway, we just did not address multi-core on RiscV yet. > [@bog\_dan\_ro](#): > > Last weekend I create a simple FDT parser which extracts all the needed info (boot hart id, CPUs count, memory regions, timer hz & interrupt-controler mem reg) which is now hard-coded. I need help with two things: I do not want to slowdown your enthusiasm, but want to prevent you from being disappointed when expecting too much out of this. To be clear: I think it would be good to provide the possibility to do DTB parsing when enabling new hardware in general. There are probably good targets for this, like configureable qemu targets, or unknown RAM configurations on the other hand. Therefore, I like your idea to provide a simple parser - as a library/tool - and potentially your board target(s) as blueprint for using it. Then everybody, who wants to benefit from it when enabling new hardware, can borrow it from there. And maybe, we’ll use it in mainline at some point, e.g. to ease the adaptation of the Qemu target. On the other hand, it is enough for a bunch of hardware and scenarios to keep the most simple, low-complex variant of having 3-4 constant values compiled in. We also have scenarios, where the board’s peripherals and memory is hard split into a (TrustZone) secure Genode enclave and “non-secure” other OS side, where using derived memory values from the DTB would even stay in the way. We might have booting environments without DTB at all. Providing the ability of configuration (here in form of DTB), can also mislead the user, and result in frustration, when adaption of configuration does not lead to the expected result. Remember the example from above. When you add additional cpu-cores, although the implementation doesn’t support that. Users will likely think that all other definition within the DTB are evaluated as well. We already have a bunch of ARM hardware, where we would need to test and adapt the codebase, when the DTB evaluation gets a mandatory part of the Genode framework. For all of these reasons, we will not make it a mandatory part of the framework at least for now. > [@bog\_dan\_ro](#): > > do you have any **.clang-format** for your code style? I’d like to run it over my code before I submit the patch as my ide (qt-creator) doesn’t know the code style used in genode so it broke most of the new/changed lines. Not that I know. > [@bog\_dan\_ro](#): > > I need some help to pass the extracted infoto the core part and make use of them. Well, memory can be add within the bootstrap code in a dynamic fashion already, as well as CPUs, please have a look at the x86 architecture as a potential blueprint. Here, the memory ranges are provided via multiboot information, and the concrete CPU cores are parsed from ACPI information. Regarding the timer frequency, you might have a look at the ARM generic\_timer in `repos/base-hw/src/core/spec/arm/generic_timer.*`, which also reads out the frequency at runtime.